VM-LEARNING /class.xi ·track.cs ·ch-1-4 session: 2026_27
$cd ..

~/Boolean Logic

root@vm-learning ~ $ open ch-1-4
UNIT 1 ▪ CHAPTER 4
04
Boolean Logic
Gates · Truth Tables · De Morgan's Laws · Logic Circuits
Boolean logic is a branch of algebra in which every variable has only two possible values — TRUE (1) or FALSE (0). It was formulated by the British mathematician George Boole in his 1854 book An Investigation of the Laws of Thought. Almost a century later, in 1938, Claude Shannon showed that electrical switching circuits could be designed using Boole's algebra — and the age of digital electronics began. Every CPU, every smartphone, every router performs its work by combining billions of tiny logic gates, each implementing one Boolean operation.
Why this chapter matters:
  • Hardware — the ALU in your CPU is built entirely from AND, OR and NOT gates.
  • Softwareif, while and the keywords and / or / not in Python are Boolean operations.
  • Search — "laptop AND <50000 NOT refurbished" on an e-commerce site is a Boolean query.
  • Everyday logic — "I will go out only if it is not raining and I have finished homework."
Learning Outcome 1: Identify Boolean values and the three basic operators (NOT, AND, OR), and construct their truth tables.

4.1 Boolean Values, Variables & Constants

A Boolean variable can hold only one of two values. Several equivalent names are used depending on context — all refer to the same pair:

Logic termBitElectronicsPython
TRUE1HIGH (e.g., +5 V)True
FALSE0LOW (0 V)False

Boolean variables are usually written as capital letters A, B, C …. They are combined using three basic operators — NOT, AND and OR — which together form a complete set (every possible logic function can be built from them).

4.2 NOT — Inversion (unary)

The NOT operator has just one input. It flips the value: TRUE becomes FALSE, FALSE becomes TRUE. Also called inversion or complement.

Notation: NOT A  =  ¬A  =  A'  =  Ā
ANOT A
01
10

4.3 AND — Conjunction

The AND operator returns TRUE only when every input is TRUE. With any FALSE input, the output is FALSE. It behaves like multiplication of 0s and 1s.

Notation: A AND B  =  A · B  =  A ∧ B  =  AB
ABA · B
000
010
100
111

4.4 OR — Disjunction

The OR operator returns TRUE if at least one input is TRUE. It returns FALSE only when all inputs are FALSE. It behaves like addition (with 1 + 1 = 1, saturated).

Notation: A OR B  =  A + B  =  A ∨ B
ABA + B
000
011
101
111
Everyday language check:
  • AND = "both must be true" — "You pass if attendance > 75% AND marks > 33%."
  • OR = "at least one must be true" — "Tickets are free for senior citizens OR children under 5."
  • NOT = "the opposite" — "I will attend the match only if it is NOT raining."

4.5 Logic Gate Symbols — Reference Chart

A logic gate is the physical electronic circuit that implements a Boolean operator. Each gate has a standard shape so that anyone, anywhere, can read a circuit drawing:

The six standard gate symbols: A Y NOT Y = A' A B Y AND Y = A · B A B Y OR Y = A + B A B Y NAND Y = (A · B)' A B Y NOR Y = (A + B)' A B Y XOR Y = A ⊕ B Memory aids • NOT = triangle + bubble • AND = D-shape • OR = shield-shape • N-gate = base gate + output bubble • XOR = OR with an extra curve Bubble always means NOT (inverts whatever it touches) Every digital chip you will ever study is drawn using only these six symbols (and their variants).
Learning Outcome 2: Describe the derived gates (NAND, NOR, XOR) and construct their truth tables.

4.6 NAND — NOT-AND

A NAND gate is exactly an AND gate followed by a NOT. Every row of its truth table is the opposite of the AND row.

Y = (A · B)' = NOT (A AND B)
ABA · BNAND = (A · B)'
0001
0101
1001
1110

4.7 NOR — NOT-OR

A NOR gate is an OR gate followed by a NOT. Output is TRUE only when every input is 0.

Y = (A + B)' = NOT (A OR B)
ABA + BNOR = (A + B)'
0001
0110
1010
1110

4.8 XOR — Exclusive OR

The XOR gate returns TRUE only when the two inputs differ — exactly one is 1 and the other is 0. In words: "A or B, but not both."

Y = A ⊕ B = (A · B') + (A' · B)
ABXOR = A ⊕ BInputs are…
000same
011different
101different
110same
XOR in the real world:
  • Half-adder — sum bit in binary addition is computed with XOR.
  • Parity / error detection — XOR of all bits gives the parity bit.
  • Simple encryption — XOR-ing plain text with a key gives cipher text; XOR-ing again with the same key recovers the original.

4.9 Summary — All Six 2-Input Gates in One Table

ABA · B (AND)A + B (OR)NANDNORA ⊕ B (XOR)
0000110
0101101
1001101
1111000
NAND and NOR are "universal" gates. From NAND alone (or NOR alone) you can build every other logic operation — NOT, AND, OR, XOR. Real chips like the 7400-series use NAND gates heavily for this reason.
  • NOT A = A NAND A
  • A AND B = NOT (A NAND B) = (A NAND B) NAND (A NAND B)
  • A OR B = (NOT A) NAND (NOT B) = (A NAND A) NAND (B NAND B)
Learning Outcome 3: Apply Boolean identities and De Morgan's laws to simplify expressions.

4.10 Fundamental Boolean Laws / Identities

Boolean algebra has a small set of laws that are used to simplify large expressions. Simpler expression = fewer gates = cheaper, faster circuit.

LawFor AND (·)For OR (+)
IdentityA · 1 = AA + 0 = A
Null / DominanceA · 0 = 0A + 1 = 1
IdempotentA · A = AA + A = A
ComplementA · A' = 0A + A' = 1
Double negation(A')' = A
CommutativeA · B = B · AA + B = B + A
Associative(A · B) · C = A · (B · C)(A + B) + C = A + (B + C)
DistributiveA · (B + C) = A·B + A·CA + (B · C) = (A+B) · (A+C)
AbsorptionA · (A + B) = AA + A · B = A
De Morgan's(A · B)' = A' + B'(A + B)' = A' · B'
Simplification example. Simplify Y = A · B + A · B'
Y = A · B + A · B'
  = A · (B + B')       ← distributive
  = A · 1              ← complement: B + B' = 1
  = A                  ← identity

∴ Y = A   (the variable B is irrelevant!)
This is the power of Boolean algebra — an expression that looks like it needs 4 gates reduces to a wire.

4.11 De Morgan's Laws

Two special laws are named after Augustus De Morgan (1806 – 1871). They tell us how to push a NOT through an AND or an OR — and are the single most useful identity for simplifying logic circuits.

Law 1: (A · B)' = A' + B'    "the NOT of an AND is the OR of the NOTs"
Law 2: (A + B)' = A' · B'    "the NOT of an OR is the AND of the NOTs"

4.11.1 Verification by Truth Table

Build a truth table for both sides of Law 1 and check that the last two columns match — row by row.

ABA · B(A · B)'A'B'A' + B'
0001111
0101101
1001011
1110000

The two bold columns are identical → Law 1 is proved. Law 2 can be verified the same way.

4.11.2 An Everyday Illustration

Imagine a shop sign that says: "Entry allowed if you are not (under 18 AND unaccompanied)."

De Morgan's Law 1 lets us rewrite this as:
  "Entry allowed if you are not under 18, OR you are not unaccompanied (i.e., you have an adult with you)."

Both sentences mean exactly the same thing — but the second one is easier to read at a glance.

4.11.3 Extended De Morgan (more variables)

(A · B · C)' = A' + B' + C'
(A + B + C)' = A' · B' · C'

In general: to negate a product, complement each variable and change · into +; to negate a sum, complement each variable and change + into ·.

Learning Outcome 4: Draw and interpret logic circuits from Boolean expressions.

4.12 Logic Circuits

A logic circuit is a drawing that shows how several gates are wired together so that their combined output computes a given Boolean expression. Circuits are read left to right: inputs on the left, output on the right.

4.12.1 Drawing a Circuit from an Expression

Work from the innermost part of the expression outwards — that is, in the same order you would evaluate it arithmetically.

Draw the circuit for  Y = (A · B) + C' A B C AND A · B NOT C' OR Y = (A · B) + C' Reading the circuit — A and B are AND-ed; C is inverted; those two wires feed an OR gate; OR gate's output is Y.

4.12.2 Reading a Circuit — Expression from Diagram

The reverse direction is just as important in exams: given the circuit, write the Boolean expression. Work from left to right, labelling the output of each gate, then combine.

Circuit → expression. Suppose a circuit shows: inputs P, Q, R; P & Q go into a NAND gate; the NAND output and R go into a NOR gate; the NOR output is the final result Y.
Stage 1 — output of NAND(P, Q) = (P · Q)'
Stage 2 — output of NOR((P · Q)', R) = ((P · Q)' + R)'

∴ Y = ((P · Q)' + R)'

Using De Morgan on the outside:
    Y = ((P · Q)')' · R'
      =  (P · Q)    · R'
      =  P · Q · R'
The simplified form P · Q · R' has only 3 gates' worth of cost (2 ANDs + 1 NOT) instead of the original 3 gates, and tells us immediately when Y = 1: when P = 1, Q = 1 and R = 0.

4.13 Universal Gates — Building Everything from NAND

Because NAND and NOR are functionally complete, entire CPUs can be built out of just one type of gate. Here is how the three basic operations look when built from NAND gates only:

NOT, AND and OR built from NAND: NOT from 1 NAND A NAND Y = A' tie both NAND inputs together (A NAND A)' = A' AND from 2 NANDs A B NAND NAND Y = A · B 2nd NAND = NOT → inverts the 1st output ((A · B)')' = A · B OR from 3 NANDs A B NAND Y = A + B De Morgan: A + B = (A' · B')' Similar constructions exist with NOR gates. Hence the name universal gate.

📌 Quick Revision — Chapter 4 at a Glance

  • Boolean algebra has only 2 values: 1 (TRUE) and 0 (FALSE). Named after George Boole (1854).
  • Basic operators: NOT (flip), AND (both must be 1), OR (at least one is 1).
  • Truth table = a table listing the output for every combination of inputs. n inputs → 2n rows.
  • Derived gates: NAND = NOT AND; NOR = NOT OR; XOR = TRUE when inputs differ.
  • Gate symbols: NOT = triangle + bubble; AND = D-shape; OR = shield; N-variants = add bubble; XOR = OR with an extra curve.
  • Universal gates: NAND alone (or NOR alone) can build every other gate.
  • Key laws: Identity (A·1=A, A+0=A), Null (A·0=0, A+1=1), Idempotent (A·A=A), Complement (A·A'=0, A+A'=1), Double-negation ((A')' = A), Commutative, Associative, Distributive, Absorption.
  • De Morgan's Laws: (A · B)' = A' + B'   and   (A + B)' = A' · B'. Generalises to any number of variables.
  • Logic circuit = drawing of gates wired to implement a Boolean expression. Inputs on left, output on right.
  • Draw a circuit by going outwards from the innermost sub-expression; read a circuit by labelling each gate's output left to right.
  • Simplification via Boolean laws reduces gate count → cheaper and faster hardware.
🧠Practice Quiz — test yourself on this chapter